Multicore NF Scalability, Application-Aware Steering, Lock Elimination

Multicore NF Scalability, Application-Aware Steering, Lock Elimination

AppSteer introduces a Linux/eBPF-based framework that enables network functions to steer requests at application-key granularity (e.g., user ID) instead of only by TCP/UDP flow. This design supports lock-free, per-core partitioned state for compute-intensive NFs (e.g., 5G core NFs), delivering 15-18% more throughput at 16 cores compared to conventional approaches

Network IO, Intel Data Direct IO (DDIO), Microarchitecture Simulation

Network IO, Intel Data Direct IO (DDIO), Microarchitecture Simulation


DDIOSim is an open-source, cycle-accurate simulator combining QSim and ChampSim to model Intel’s DDIO technology, which allows direct NIC-to-Last Level Cache (LLC) data transfer. The tool enables researchers to explore design, performance, and system interactions of DDIO-based network architectures, assessing cache/DRAM use, throughput, and latency for diverse workloads

BGP Protocol, Router Design, Plane Separation

BGP Protocol, Router Design, Plane Separation

This work proposes BGP Separation (BGPsep), where the forwarding and routing planes of BGP routers are decoupled, enabling more secure and robust Internet routing. The architecture allows for route validation, policy enforcement, and easier manageability of routing infrastructure, reducing attack surfaces and improving reliability.

Scalable Control Planes for Programmable Networks

Scalable Control Planes for Programmable Networks

Pyramis presents a hierarchical control-plane architecture for managing large-scale programmable networks (e.g., with many P4 switches). By partitioning device control among distributed controllers, it achieves scalability and modularity without sacrificing consistency, ensuring performance in both configuration change rate and rule installation.

5G User Plane Function Acceleration with Programmable Dataplanes

5G User Plane Function Acceleration with Programmable Dataplanes

AccelUPF introduces a 5G User Plane Function (UPF) that offloads both data forwarding and Packet Forwarding Control Protocol (PFCP) signaling message processing to programmable hardware like P4 switches and smartNICs. Unlike prior work, which only offloads data forwarding, AccelUPF’s full offload design demonstrates superior performance—crucial for applications with high signaling traffic (e.g., IoT)—through novel parsing, fastpath/slowpath task split, memory management, and fault tolerance for session state.