TurboEPC – Accelerating Mobile Packet Core Using Programmable Dataplane
TurboEPC redesigns the mobile packet core by offloading a subset of control plane signaling procedures to programmable dataplane switches. This improves throughput and latency by processing frequent signaling messages closer to the edge. The paper discusses challenges like user state partitioning and replication for fault tolerance, provides software and hardware prototypes using P4 switches and smartNICs, and reports up to 102% throughput increase and 98% latency reduction.